Senior Engineer, NPI Packaging


San Diego, CA, US

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Job Summary

As the Senior Engineer, NPI Packaging, you will be responsible for providing package engineering development for new PSemi products.  You will participate on cross functional product teams developing RF and mixed signal products for use across a broad range of frequencies (<6Ghz and mmWave applications). The NPI packaging engineer is responsible for all phases of product development which include early concept feasibility, prototyping, product qualification, and production transition to production. 


The assigned tasks/projects will be diverse in scope and will require this position to apply a wide range of experience to complete the projects. This position will use data analysis to drive most decisions. Packaging Engineering is responsible for developing manufacturable packages and robust manufacturing processes to introduce new products to the market. This position will be expected to coordinate activities with other engineers working on the project. This position must enjoy working in a fast-paced environment while maintaining a sense of commitment and be flexible to project needs. The position must be a team player and possess a sense of urgency to meet product requirements on schedule.


The primary location for this position is San Diego, CA, and a hybrid work schedule may be implemented depending on business need.


Roles & Responsibilities

This position has responsibility for:

  • Coordinate, prepare, and review design documentation for both chip fabrication and component assemblies
  • Lead the design and procurement of PCB fabrication and assembly services of both microelectronics devices as well as PCB assemblies
  • Performs design for assembly, design rule checks, tolerance analysis, and performs multiple analytical assessments including finite element analysis to ensure the product design is compliant with requirements
  • Constantly evaluate and implement improvements to the engineering development process
  • Plan activities in the design and development of laminate substrates for single chip ICs and for multi-chip System in Package
  • Perform package feasibility studies and package selection efforts for new products
  • Assist technology development teams with developing advanced design rules
  • Coordinate package development with new product development teams, operations, and suppliers
  • Assists with the design to cost and risk analysis
  • Planning and execution of product characterization DOEs
  • Defining appropriate bill of materials for new packages at production assembly suppliers
  • Ensuring proper assembly process characterization of proposed package BOM
  • Leading failure analysis and problem resolution in the development process or production environment
  • Mentor junior engineers in all aspects of the packaging and assembly disciplines


Competency Requirements

In order to perform the job successfully, an individual should demonstrate the following competencies:

  • Driving for Results: Aggressively pursues challenging goals and objectives; will put in considerable time and effort to accomplish objectives; takes a highly focused, goal driven approach toward work
  • Acting Decisively: Moves quickly to make decisions and commit to a clear course of action; comfortable making decisions based on partial information; willing to take risks in order to maintain momentum; shows a strong bias toward action
  • Acting as a Champion for Change: Challenges the status quo; encourages people to question existing methods, practices, and assumptions; supports people in their efforts to try new things
  • Critical thinking:  Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations
  • Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information


Minimum Qualifications (Experience and Skills)

  • Typically requires 3 to 5 years of experience, depending on education level, preferably in the semiconductor manufacturing field
  • Expertise with Design tools such as Cadence (PCB layout), AutoCAD (Mech), and ANSYS (FEA).
  • Experience with electrical, mechanical, or thermal modeling
  • Experience with design of RF products
  • Experience with package assembly process development for high volume commercial products.
  • Understanding the chip design and manufacturing process and its interaction with packaging and assembly
  • Experience with PCB fabrication processes and design
  • Cross-functional team leadership
  • Experience driving packaging development efforts
  • Experience working with off-shore assembly suppliers
  • Understanding of the semiconductor supply chain
  • Understanding materials properties and interactions
  • Familiarity with Microelectronic packaging technologies including SMT, flip chip bumping, Flip Chip attach, Flux cleaning, Overmold, package marking, dicing, test, and packaging for shipment


Preferred Qualifications

  • Experience with statistical analysis software/tools
  • Experience with Excel based macros and an aptitude for automating tasks.
  • Experience with electrical and/or thermal modeling
  • Understanding basic semiconductor quality and reliability requirements
  • Demonstrated experience with DOE methodology
  • Understanding package reliability and failure modes


Education Requirements

  • Bachelor’s in Engineering (Packaging, Electrical, Mechanical, Materials or Chemical), Physics or Chemistry; MS preferred


Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.


Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.

pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents:

Nearest Major Market: San Diego