Senior Staff Engineer, Digital ASIC Sensor Design


Austin, TX, US

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Job Summary

This position is for a senior staff level engineer in the Digital Engineering team within the Sensor/ASIC Development Department.  The primary responsibilities include, but will not be limited to, managing in a hands-on fashion to technically guide chip and IP development, defining the sensor group’s ASIC and IP methodology and infrastructure, tracking deliverables to ensure timely execution with high quality.  The individual will work closely with the digital and RFIC design teams in support of pSemi’s advanced RFIC and SoC products.


Roles & Responsibilities

This position has responsibility for:

  • Work with marketing team to define ASICs and IP as needed
  • Provide technical leadership, insight, mentoring, and support to the digital design team
  • Architect, design, and verify digital logic to meet critical power, performance, and area targets
  • Design the digital logic needed for calibration, control, data processing, and enablement for the mixed-signal IP and ASICs. Perform integration of mixed-signal IP
  • Architect and implement cutting edge solutions including DSP blocks, digital filters etc. incorporating low power methodologies with multi-rate asynchronous clock domains
  • Contribute to the design team efficiency, productivity and quality through flow and methodology development
  • Contribute to all aspects of the design process from system conceptualization to mass production - Participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), digital design verification, and full-chip mixed-signal verification, detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required for the achievement of high volume production
  • Establish industry standard tools flow
  • Interact with and aid in the development of verification team
  • Interact with and aid in the development of system verification
  • Work with interdisciplinary teams to identify automation and tool requirements


Competency Requirements

In order to perform the job successfully, an individual should demonstrate the following competencies:

  • Displaying Technical Expertise: Keeps his/her technical skills current; effectively applies specialized knowledge and skills to perform work tasks; understands and masters the technical skills, knowledge, and tasks associated with his/her job; shares technical expertise with others
  • Driving for Results: Aggressively pursues challenging goals and objectives; willing to put in considerable time and effort to accomplish objectives; takes a highly focused, goal driven approach toward work
  • Making Accurate Judgments and Decisions: Bases decisions on a systematic review of relevant facts and information; avoids making assumptions or rushing to judgment; provides clear rationale for decisions
  • Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information
  • Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations


Minimum Qualifications (Experience and Skills)

  • 12+ years of experience developing RTL/Digital circuits for ASICs
  • Knowledge of all aspects of SoC design with experience in architecting & designing digital systems from concept through to tape out
  • Deep understanding of digital design flow from architecture to in depth knowledge in RTL design, verification, synthesis, timing closure and scan insertion
  • Knowledge of transistor level circuit design
  • Experience with Verilog, design signoff tools and flows, Virtuoso
  • Understanding of discrete-time, z-domain, digital signal processing, digital filter design (FIR, IIR)
  • Ability to model control loop feedback and signal processing algorithms using tools such as MATLAB & Simulink
  • Experience in developing variety of digital and DSP IP blocks
  • Support post-silicon activities including validation, characterization, and product test
  • High proficiency in logic design including state machines, serial interfaces,  multiple clock domain designs
  • Experience in IP integration of blocks such as SRAM, OTP, Microcontroller/CPU cores, Low power designs
  • Experience working on digital in the context of high-performance mixed-signal ASICs/SoCs
  • Familiarity with serial interface standards such as SPI, I2C, MIPI
  • Experience related to synthesis and place and route
  • Experience related to ATPG and functional test pattern generation
  • Familiar with Cadence and Synopsys tool suites (Synthesis, Place and Route, STA, CDC, Low power, DFT)
  • Software programming ability in high level languages such as C as well as scripting languages such as Python, Tcl , Perl & Unix C shell
  • Strong communication and documentation skills


Preferred Qualifications

  • Knowledge of Sensors, delta-sigma modulators, decimation/interpolation filters
  • In depth knowledge of sub-micron technology is highly desired
  • Strong project management skills
  • Experience with Standard cell library development and characterization
  • Understanding of semiconductor consumer product life cycle
  • Experience working with global design and cross functional teams
  • Ability to work in a fast paced, multi-tasking environment
  • Technical expertise in a design sub-function
  • Excellent problem-solving skills
  • Excellent verbal/written communication and presentation skills
  • Leader who can develop technical skills of the team
  • Experience handling test equipment such as oscilloscopes, function generators, DVMs

Education Requirements

  • Bachelor’s degree in Electrical Engineering or Computer Engineering, Masters preferred


Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.


Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.

Minimum Salary:    $168,614.93
Maximum Salary:    $235,253.16

pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents:

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Nearest Major Market: Austin