Sr. Staff Engineer, Packaging Design - Bumping R&D

Location: 

TAIPEI, TW, 10050

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Drive the Future of Semiconductor Integration

 

Join pSemi, a Murata company, and be part of a team that is shaping the future of semiconductor integration. We build upon Peregrine Semiconductor's legacy of innovation, with a focus on enhancing Murata's world-class capabilities with high-performance semiconductors. Our product portfolio spans power management, connected sensors, optical transceivers, antenna tuning, and RF frontends – enabling advanced modules for diverse applications like smartphones, base stations, electric vehicles, and more.

 

About the Role

As a Sr. Staff Engineer, Packaging Design - Bumping R&D, you will be a key player in our mission to create smaller, thinner, faster, and better electronics for the connected world. You will be responsible for all aspects of wafer bumping process development, from early concept feasibility to high-volume production. This is an opportunity to utilize your deep understanding of microelectronics packaging technologies and lead the development of cutting-edge bumping solutions for high-reliability applications.

 

What You Will Do

  • Lead Innovation: Independently drive R&D technology developments and qualification of future bumping technology implementations.
  • Shape the Roadmap: Lead the development and maintenance of a forward-looking bumping roadmap, aligning with product line roadmaps and other technology roadmaps.
  • Identify Opportunities: Identify new packaging technologies and/or suppliers to drive product line roadmaps in a competitive market landscape.
  • Define Processes: Define and develop manufacturing processes and document design rules for product development teams.
  • Collaborate: Coordinate with cross-functional teams to assess feasibility and make informed design decisions related to packaging and assembly processes.
  • Ensure Quality: Plan and oversee DoE experiments, collecting data to substantiate design decisions and mitigate technical risk.
  • Mentor and Lead: Provide mentorship to other engineers and lead cross-functional teams.

 

What You Need

 

  • Education: Bachelor's or higher degree in Engineering (Packaging, Electrical, Mechanical, Materials or Chemical), Physics or Chemistry.

 

  • Experience:
    • 12+ years of electronics packaging experience with a Bachelor's degree (8+ years with a Master's, 5+ years with a Ph.D.).
    • 5+ years of hands-on experience with wafer bumping.
    • Deep understanding of scientific and technical aspects of copper pillar and solderball drop wafer bumping processes.
    • Experience with IC pad design/bump interactions on SOI and GaAs technologies.

 

  • Expertise:
    • Knowledge of chip design, material properties, and interactions with manufacturing processes.
    • Hands-on experience with best-in-class wafer bumping process and quality control, including process control methodologies, control plan, and OCAP process.
    • Familiarity with bump metrology methods used for process monitoring.
    • Understanding of semiconductor supply chain management principles and DOE methodology.

 

  • Leadership: Demonstrated experience driving packaging technology developments and working with offshore assembly suppliers.

 

  • Communication: Ability to present highly technical information to non-technical personnel.

 

Why pSemi?

 

At pSemi, we offer a collaborative and innovative work environment where you can make a real impact. We value diversity, continuous learning, and the well-being of our employees. Join us and contribute to the development of intelligent and efficient semiconductors that power the connected world.

 

Apply Now

If you are passionate about semiconductor integration and have the skills and experience we are looking for, we encourage you to apply!

 

Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.


pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

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